OSTO Talk to engineering

Between an NPU and a TPU

The datacenter is too far away.

We design low-power AI chips that pair a TPU-style matrix engine with programmable cores, built on mature 10 nm and larger processes to keep costs down. Cameras, wearables and machines get to make decisions on the device instead of waiting on the cloud.

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The chip

What's inside

Most AI on a device is matrix math, so we built a matrix engine for it and kept just enough programmability for everything else. The memory and sensor connections sit on the same chip, because moving data is where most of the power in AI hardware goes.

Neural cores Memory Sensor inputs Control
Simplified layout, not to scale.
A

Hybrid neural cores

A TPU-style matrix engine does the heavy math. Small programmable cores handle the layers that don't fit it, so new kinds of models still run.

B

Memory on the chip

The model lives right next to the cores that use it. Fetching data from somewhere else costs more power than the math itself, so we avoid it.

C

Sensor inputs

Cameras and microphones plug straight into the chip, so a frame from a camera gets processed without passing through a separate main processor.

D

Software

Bring a model you've already trained. Our tools convert it to run on the chip and tell you early on if something won't fit.

E

Built on mature processes

We make our chips on 10 nm and larger processes. They cost a fraction of the newest ones to produce and are easier to get factory time on. The power savings come from the design, not the process.

Have a model you want to run on a device? Let's talk.

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or email tanzim@ostolabs.com